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abstract indexed · arXiv 2609.37711 · updated 2026-10-18

Zephyr: An Efficient Audio Denoising System Using Spiking Neural Networks Enabled With A Sparsity-Aware Flexible FPGA PE Array

First page of Zephyr: An Efficient Audio Denoising System Using Spiking Neural Networks Enabled With A Sparsity-Aware Flexible FPGA PE Array
From the original paper · arXiv 2609.37711Page 1. Select the image to read the PDF.

Replaces conventional neural network audio denoising inference on edge devices with a spiking neural network (converted Spiking-FullSubNet via QAT and activation simplification) executed on a custom sparsity-aware FPGA processing-element array. Costs include designing and validating custom digital hardware, FPGA-specific engineering, and potential denoising quality degradation from quantization-aware training and simplified activations, none of which the paper's abstract quantifies on the quality side. Adoption fails for anyone without FPGA hardware and hardware-design capacity, and the 28x power claim is a calculated figure for hypothetical 45nm silicon rather than a measured result.

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technical change
Spiking neural network audio denoising on custom FPGA
published
2026-09-29

The technique requires custom FPGA/digital circuit design for edge audio hardware, which is entirely outside the reader's GPU/API-based production inference practice.

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  1. claim 01Paperraft inference
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    Replaces conventional neural network audio denoising inference on edge devices with a spiking neural network (converted Spiking-FullSubNet via QAT and activation simplification) executed on a custom sparsity-aware FPGA processing-element array. Costs include designing and validating custom digital hardware, FPGA-specific engineering, and potential denoising quality degradation from quantization-aware training and simplified activations, none of which the paper's abstract quantifies on the quality side. Adoption fails for anyone without FPGA hardware and hardware-design capacity, and the 28x power claim is a calculated figure for hypothetical 45nm silicon rather than a measured result.

    This is a Paperraft inference. It is not pinned to a verified PDF passage.

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  2. claim 02Paperraft inference

    Approximately 28x improvement in power consumption, reaching 52.9 nJ per 32 ms audio frame in custom digital hardware at 45nm; real-time factor 0.727 at 100 MHz on a PYNQ-Z1 FPGA.

    This is a Paperraft inference. It is not pinned to a verified PDF passage.

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