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abstract indexed · arXiv 2609.15627 · updated 2026-10-18

DeepSeek-V4-Flash on AMD gfx90a: Correctness Recovery and Inference Performance Engineering

First page of DeepSeek-V4-Flash on AMD gfx90a: Correctness Recovery and Inference Performance Engineering
From the original paper · arXiv 2609.15627Page 1. Select the image to read the PDF.

The work replaces a default SGLang execution path with a hardware-specific stack combining FP4 routed-expert computation, FP8 dense projections, CDNA2 MFMA and dot-product kernels, HIP graphs, and a load-time repair of a numerically incorrect routed-expert W2 weight layout, validated by fixed-token and hash-based correctness checks. The cost is substantial porting and validation effort tied to AMD gfx90a hardware, plus the ongoing burden of maintaining packed FP4 formats, topology-aware kernel tuning, and custom correctness harnesses. It can fail silently through weight-layout or execution-format mismatches that produce fast but numerically wrong output, and through low-M utilization and per-layer synchronization overhead that erode the expected gains.

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What you would change

Check the supported GPU, tensor shapes, and precision, then replace only the relevant kernel.

Try the idea on your product

A proposed first test. Set your budget and success criteria before running it.

Check the supported GPU, tensor shapes, and precision, then replace only the relevant kernel.

Compare against

The existing kernel inside the same complete serving pipeline.

  1. Locate the paper's implementation and check its license, model support, data needs, and hardware requirements. Stop here if you cannot obtain the required artifacts.
  2. Save a small set of representative product tasks and expected outcomes. Keep evaluation tasks out of any training or tuning, and choose quality and cost limits before running.
  3. Run the baseline and the proposed change on identical inputs. Keep other settings fixed and repeat paired runs to expose variation.
  4. Save per-task outputs, failures, timings, and all usage costs. Review regressions before expanding the test.

What to measure

Numerical differences, end-to-end latency, throughput, and memory at realistic shapes.

When to keep it

Keep the change only if it meets your preselected quality and latency limits and improves the metric you care about after setup and operating costs. Otherwise retain the baseline. This is an exploration plan, not a validated recommendation.

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published evidence setup
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source-linked claims
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exposure checks
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Why it was shortlisted

The technical change, research area, and reason it entered the archive.

recommendation
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research area
attention and kernels
technical change
FP4 MoE inference enablement on AMD CDNA2
published
2026-09-14

The techniques require four MI250 GCDs and low-level CDNA2 kernel engineering that the reader's 24 GB GPU and small team cannot replicate, though the load-time layout verification practice is worth noting as a general principle.

About the technical core

The technical core is a system design, not an equation.

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Claims and evidence

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  1. claim 01Paperraft inference
    Read the brief interpretation

    The work replaces a default SGLang execution path with a hardware-specific stack combining FP4 routed-expert computation, FP8 dense projections, CDNA2 MFMA and dot-product kernels, HIP graphs, and a load-time repair of a numerically incorrect routed-expert W2 weight layout, validated by fixed-token and hash-based correctness checks. The cost is substantial porting and validation effort tied to AMD gfx90a hardware, plus the ongoing burden of maintaining packed FP4 formats, topology-aware kernel tuning, and custom correctness harnesses. It can fail silently through weight-layout or execution-format mismatches that produce fast but numerically wrong output, and through low-M utilization and per-layer synchronization overhead that erode the expected gains.

    This is a Paperraft inference. It is not pinned to a verified PDF passage.

    Inspect the source
  2. claim 02Paperraft inference

    On four MI250 GCDs, TP4/EP1 decode reaches approximately 74.5 tok/s and a 4,604-token prompt achieves approximately 2,234 input tok/s prefill throughput; no baseline comparison factor is reported.

    This is a Paperraft inference. It is not pinned to a verified PDF passage.

    Inspect the source

Exposure map

Author findings, Paperraft interpretations, and the next check. Missing analysis never counts as evidence of safety.

quality

Still unknown

Which tasks improve, and which regress against the baseline?

compute and memory

Still unknown

What memory, hardware, and total compute does the complete method require?

latency

Still unknown

Are startup time, typical response time, and slow requests measured separately?

operations

Still unknown

What must be monitored, maintained, and rolled back?

software compatibility

Still unknown

Does the implementation support your model, runtime, and hardware?

security

Still unknown

What new data access, permissions, or trust boundaries does it introduce?

data and training

Still unknown

What data preparation or training is required, and is it included in the cost?

reproducibility

Still unknown

Are code, versions, inputs, and evaluation scripts available?

Continue the investigation

A reading guide for attention and kernels.

Editorial prompts, not findings from this paper or a validated test plan. Detailed analysis is still pending for the topics below.

What to inspect

Which tensor shapes, precision settings, and hardware support the reported kernel result?

Plan a fair comparison

Can you compare against the existing implementation on the same inputs, checking numerical error and end-to-end time?

Questions for adoption

Are the gains limited to a microbenchmark, or do they appear in the complete model workload?

Read the paper with these questions

Inside the paper

Preview the first 3 pages of the original PDF. Click the stack to turn the page.

The downloadable skill includes SKILL.md and evidence.json, with recorded findings and unanswered checks. TRY-IT.md adds a product test plan and a blank results sheet.

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Provisional research brief updated 2026-10-18. Paperraft has not reproduced this experiment.

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arXiv 2609.15627

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