{ "schema_version": 1, "builder_plan": { "scenario": "Profiling shows attention computation is a bottleneck in your self-hosted service.", "change": "Check the supported GPU, tensor shapes, and precision, then replace only the relevant kernel.", "baseline": "The existing kernel inside the same complete serving pipeline.", "steps": [ "Locate the paper's implementation and check its license, model support, data needs, and hardware requirements. Stop here if you cannot obtain the required artifacts.", "Save a small set of representative product tasks and expected outcomes. Keep evaluation tasks out of any training or tuning, and choose quality and cost limits before running.", "Run the baseline and the proposed change on identical inputs. Keep other settings fixed and repeat paired runs to expose variation.", "Save per-task outputs, failures, timings, and all usage costs. Review regressions before expanding the test." ], "measure": "Numerical differences, end-to-end latency, throughput, and memory at realistic shapes.", "decision": "Keep the change only if it meets your preselected quality and latency limits and improves the metric you care about after setup and operating costs. Otherwise retain the baseline. This is an exploration plan, not a validated recommendation." }, "builder_review": null, "arxiv_id": "2609.12923", "title": "Dissecting GPU Utilization for LLM Inference on Nvidia Hopper", "summary": "The method replaces the single SM utilization percentage with eight counter-validated views derived from raw Nsight Compute reports, mapping utilization gaps to concrete mechanisms such as fragment fill, occupancy limits, stall signatures, wave quantization, and kernel selection. The cost is profiling overhead and engineering effort: NCU runs add measurement time, require hardware counter access, and demand expertise to interpret per-layer kernel roles across the serving stack. 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To capture whole-device matmul throughput, we take NCU’s compute_sol_pct (the Compute (SM) Throughput SOL metric on the SMs the kernel reaches, §3) and scale it by spatial coverage to obtain device-wide compute SOL, a per-kernel analog of model-level MFU:", "headline": "", "explanation": "", "objective": "", "symbols": {}, "evidence": "", "evidence_url": "", "source_url": "" }, { "anchor": "S5.EGx1", "label": "", "section": "5 The Eight-Metric Characterization", "role": "metric", "latex": "R_{\\text{eff}} =\\lceil R/8\\rceil\\cdot 8, \\\\ \\eta_{\\text{reg}} =\\min\\!\\left(64,\\ W_{\\text{block}}\\cdot\\left\\lfloor\\tfrac{65536}{R_{\\text{eff}}\\cdot W_{\\text{block}}\\cdot 32}\\right\\rfloor\\right), \\\\ \\eta_{\\text{smem}} =\\min\\!\\left(64,\\ \\left\\lfloor\\tfrac{228\\cdot 1024}{S_{\\text{block}}}\\right\\rfloor\\cdot W_{\\text{block}}\\right),", "mathml": "Reff=⌈R/8⌉⋅8,ηreg=min⁡(64,Wblock⋅⌊65536Reff⋅Wblock⋅32⌋),ηsmem=min⁡(64,⌊228⋅1024Sblock⌋⋅Wblock),", "context": "Section 5.2 shows that the warp-pool cap is set by the kernel, not by the architecture. The two resources that most often bind are the register file and shared memory:", "headline": "", "explanation": "", "objective": "", "symbols": {}, "evidence": "", "evidence_url": "", "source_url": "" } ], "equations_status": "selected", "core_kind": "formula", "equations_fetched_at": "2026-09-30", "equations_source_url": "", "equations_source_sha256": "", "exposures_reviewed_at": "", "exposures_source_sha256": "" }